Various techniques have been developed for obtaining 3D image data and generating 3D images. One such technique involves direct imaging using a camera system that includes an electromagnetic radiation source for illuminating a subject with a modulated light signal or pulses, and determining the return time and/or signal intensity of resulting reflected radiation. This technique is generally referred to as time-of-flight (TOF) imaging, and can be implemented in various known ways, typically using infra-red (IR) or visible light. Optionally, electromagnetic radiation other than light may be employed, but for simplicity, it will be assumed in the description below that the illuminating energy is IR.
Camera systems for TOF imaging are generally comprised of an optical unit, a sensor array formed of individual detector pixels, and suitable control electronics. The sensor arrays are conventionally formed of charge-coupled devices, photodiodes, or as photogate arrays constructed using complementary metal oxide semiconductor (CMOS) fabrication technology. A camera system of this type is shown, by way of example, in U.S. Pat. No. 7,342,454.
FIGS. 1A and 1B are plan and vertical cross-sectional views of a basic pixel structure (sometimes referred to below as an “imaging cell”) for a CMOS photogate type 3D camera as known in the art. In its simplest form, a pixel 10 may be comprised of a P+ (highly doped) silicon substrate 12, a P− (lightly doped) epitaxial layer 14, an N− (lightly doped) buried channel implant 16 and first and second N+ floating diffusions 18a and 18b formed within implant 16. An oxide layer 24 is formed on top of channel implant 16. A polycrystalline silicon photogate 20 and polycrystalline silicon transfer gates 22a and 22b are formed on oxide layer 24. As shown, transfer gate 22a is positioned between photogate 20 and floating diffusion 18a, and transfer gate 22b is positioned between photogate 20 and floating diffusion 18b. Other conventional CMOS structures such as drain and source metallization, wiring, etc. are omitted for clarity and simplicity of description. Conventionally, the floating diffusions 18a and 18b, photogate 20, and transfer gates 22a and 22b are relatively elongated, generally rectangular structures.
In operation, photogate 20 is energized by application of a suitable voltage at a known time in relation to the outgoing illumination and is kept energized for a set charge collection interval. The electric field resulting from the voltage applied to photogate 20 creates a charge accumulation region in channel implant 16, and photons reflected from the subject being imaged (not shown) pass through photogate 20 into channel implant 16, and cause electrons to be released there.
Transfer gates 22a and 22b are then energized in turn for respective predetermined integration intervals. The charge collected during the integration intervals is transferred to the respective floating diffusions 18a and 18b through channel 16. This charge induces voltages that can be measured and used to determine the distance to the portion of the subject imaged by the pixel 10. The TOF is then determined from the charge-induced voltages on floating diffusions 18a and 18b, the known activation timing of gates 20, 22a and 22b, and the speed of light. The floating diffusions are thus the sensing nodes of the CMOS photogate sensing pixel.
FIGS. 2A and 2B are top and cross-sectional views of a known variation of the principles shown in FIGS. 1A and 1B. Here an imaging cell 30, in addition to the structural elements described above, is provided with a stop channel structure 32 (sometimes referred to in the art as a “channel stop”). Stop channel 32 is comprised of a P-Well 32 formed along the sides of photogate 20 between transfer gates 22a and 22b, and extending down through buried channel 16 and into P− epitaxial layer 14. Stop channel 32 also includes a P+ diffusion 34 formed below oxide layer 24 overlapping the tops of P-Well 32 and channel 16. A conventional outer silicon trench isolation structure 36 may also be provided. Charge transferred from the ends of channel 16 opposite the activated transfer gate tends to be uncontrolled and noisy if the channel is not sharply terminated. Stop channel 32 provides well-defined terminations at the ends of channel 16 to help promote controlled charge transfer to floating diffusions 18a and 18b. 
FIGS. 3A and 3B show a conventional cell control and readout arrangement generally designated at 40, for the photogate cells described above. In FIGS. 3A and 3B, cell 10 (FIGS. 1A and 1B) is shown by way of example, but the same cell control and readout arrangement is applicable to cell 30 (FIGS. 2A and 2B) as well.
Signal paths 42 and 44a, 44b respectively energize photogate 20 and transfer gates 22a and 22b. Output circuits 46a and 46b provide readout of the charge-induced voltages on floating diffusions 18a and 18b respectively. Select and reset signals for output circuits 46a and 46b are respectively provided on signal paths 48 and 50.
FIG. 4 illustrates use of background illumination cancellation for TOF pixel cells as described by Kawahito et al. in A CMOS Time-of-Flight Range Image Sensor, IEEE Sensors Journal, December 2007, p. 1578. In systems employing pulsed illumination, background illumination may result in charge accumulation in the sensor cell during the intervals between illumination pulses. Under such circumstances, it may be advantageous drain such charge accumulation before initiation of each illumination cycle.
Thus, referring to FIG. 4, a pixel cell 60, shown for simplicity as having the same basic construction as cell 10 in FIGS. 1A and 1B, is modified to include background charge draining electrodes 62 coupled by signal paths 64 and 66 to Vdd line 68. An activation signal line 70 completes a discharge path for the draining electrodes. Output circuits 46a and 46b (see FIGS. 3A and 3B) are as previously described.
According to conventional practice, photogate cells as described in connection with FIGS. 1-4 above form pixels which are comprised in a 3D camera pixel array. The number of basic cells employed in a single pixel depends on the sensitivity (i.e., charge collection capability) required for a given application. For example, in mobile phone cameras or other close-up applications, a single cell per pixel may be sufficient, while in long-distance applications such as automotive ranging for which high illumination levels might pose eye-safety or other issues, multiple cells per pixel might be needed.
FIG. 5 is a greatly enlarged photo-illustration of a portion of a pixel array 80 formed by way of example comprising four cells as described above. FIGS. 6A and 6B show two alternative layouts for the cells in FIG. 5. In FIG. 6A, transfer gates 84a and 84b are of substantially the same length as photogate 86. In FIG. 6B, photogate 86′ is shorter than transfer gates 84a′ and 84b′, and also shorter than channel 88. The underlying construction of array 80 is shown in the sectional views in FIGS. 6C and 6D.
FIGS. 7A-7C show alternative known cell geometries that are also compatible with the construction of FIG. 5. The geometry of FIG. 7A is similar to that of FIG. 6A except that transfer gates 90a and 90b are substantially shorter that photogate 92, and floating diffusions 94a and 94b are shorter still. The geometry of FIG. 7B is like that of FIG. 6B, with photogate 92′ being shorter than transfer gates 90a′ and 90b′, and also shorter than channel 88. The arrangement of FIG. 7C is like that of FIG. 7B, but includes background illumination charge draining electrodes as discussed above in connection with FIG. 4.
The cell geometry options illustrated in FIGS. 6A and 6B, and FIGS. 7A-7C suffer from several disadvantages. For one thing, the capacitance of diffusions such as 82a and 82b shown in FIG. 5, and 94a and 94b shown in FIGS. 7A-7C is a function of both peripheral length and surface area. In the configurations shown in FIGS. 6A and 6B, diffusions 82a and 82b are made long to accommodate a large required area for photogates 86 so the resulting capacitance is quite high. Since the voltage induced at the floating diffusions by a given level of charge is inversely related to the capacitance, the arrangements of FIGS. 6A and 6B exhibit low sensitivity to small charge variations.
The capacitance of floating diffusions 94A and 94b in FIGS. 7A-7C is smaller than in the case of the arrangements of FIGS. 6A and 6B, which results in better sensitivity to small charge variations. However, the smaller size and positioning of the floating diffusions 94a and 94b relative to photogate 92, results in considerable variation in the distance between the floating diffusions and the different regions of the charge accumulation region under the photogate. Consequently, directional non-uniformity exists in the electric field between the floating diffusions and the photogate. This causes degradation in the transfer characteristics, i.e., variation in the time required for electrons to travel through channel 88 to the floating diffusions.
Moreover, in both layouts, the fill factor, defined as the area available for collection of electrons, i.e., by the floating diffusions, divided by the total pixel area is relatively low (typically in the 25-40% range), which, in turn requires an undesirably large pixel area and array size for a given light collecting ability.
There is accordingly a need for improved cell geometry and pixel architecture. The present invention seeks to meet this need, as well as others.